基于内存监控的芯片验证方法

2009 IEEE 8th International Conference on ASIC Pub Date : 2009-12-11 DOI:10.1109/ASICON.2009.5351303

Sheng Liu, H. Yang, Yong Li, Shuming Chen

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引用次数: 0

摘要

针对系统级模型(SLM)对设计者来说是一个“黑盒子”的情况，提出了一种基于内存监控的验证方法来协调RTL模拟器和系统级模型(SLM)模拟器的执行。该方法可以快速有效地发现RTL仿真与SLM仿真在大基准执行过程中的差异，帮助验证工程师快速发现RTL代码中的bug，加快验证的完成

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The chip Verification method based on memory monitoring

a verification method based on memory monitoring is proposed for harmonizing the execution of RTL simulator and system-level model (SLM) simulator, in the situation that the SLM is a ‘black-box’ to the designers. This method can quickly and efficiently find the differences of big benchmarks' executing process between the RTL simulation and SLM simulation, and help the verification engineers rapidly finding the bugs in the RTL codes and speedup the accomplishment of verification.1

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来源期刊

2009 IEEE 8th International Conference on ASIC

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