{"title":"CMOS对数电流发生器","authors":"K. M. Al-Tamimi, M. Al-Absi","doi":"10.1109/SCORED.2012.6518613","DOIUrl":null,"url":null,"abstract":"A new scheme for a controllable CMOS low-voltage and low-power current mode logarithmic function circuit is introduced. The proposed design provides wide normalized input range, controllable output amplitude, high accuracy and insensitive to temperature variation, while it simultaneously features the attractive characteristics of simplicity, operates under very low power supply (±0.5V), and consumes an ultra low power (0.3μW). The functionality of the proposed topology is confirmed using HSPICE with 0.35μm CMOS process.","PeriodicalId":299947,"journal":{"name":"2012 IEEE Student Conference on Research and Development (SCOReD)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"CMOS logarithmic current generator\",\"authors\":\"K. M. Al-Tamimi, M. Al-Absi\",\"doi\":\"10.1109/SCORED.2012.6518613\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new scheme for a controllable CMOS low-voltage and low-power current mode logarithmic function circuit is introduced. The proposed design provides wide normalized input range, controllable output amplitude, high accuracy and insensitive to temperature variation, while it simultaneously features the attractive characteristics of simplicity, operates under very low power supply (±0.5V), and consumes an ultra low power (0.3μW). The functionality of the proposed topology is confirmed using HSPICE with 0.35μm CMOS process.\",\"PeriodicalId\":299947,\"journal\":{\"name\":\"2012 IEEE Student Conference on Research and Development (SCOReD)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE Student Conference on Research and Development (SCOReD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SCORED.2012.6518613\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE Student Conference on Research and Development (SCOReD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SCORED.2012.6518613","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new scheme for a controllable CMOS low-voltage and low-power current mode logarithmic function circuit is introduced. The proposed design provides wide normalized input range, controllable output amplitude, high accuracy and insensitive to temperature variation, while it simultaneously features the attractive characteristics of simplicity, operates under very low power supply (±0.5V), and consumes an ultra low power (0.3μW). The functionality of the proposed topology is confirmed using HSPICE with 0.35μm CMOS process.
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