{"title":"一种低复杂度的电流转向dac标定算法","authors":"H. Hristov","doi":"10.1109/ISSE.2004.1490398","DOIUrl":null,"url":null,"abstract":"The paper presents one possible way of improving both the static and dynamic performance of a current steering digital-to-analog converter (DAC) by calibrating the current sources in the matrix. The method uses a successive approximation register (SAR) and a high resolution current comparator. The current through the least significant bit (LSB) section sets the current of a reference generator which is then used to calibrate the matrix. To avoid the need to subtract current in the process of calibration, the LSB section is purposefully oversized with respect to the MSB section. This greatly simplifies the implementation of the current generation circuitry. The fractional calibration currents are commutated by turning off the respective cascode transistors. As the calibration is intended to take place on command, in order to compensate for temperature and component parameter drift, a dedicated signal is provided to trigger the calibration process. When the cycle is completed, an \"end of conversion\" flag is raised, allowing an easy feedback control of the DAC by an external monitoring system. The paper shows that it is possible to allow a large mismatch of the matrix transistors and still achieve good linearity. Because of the reduced size, dynamic behaviour can be improved as well. Schematic solutions for the main building blocks and simulation results are also presented.","PeriodicalId":342004,"journal":{"name":"27th International Spring Seminar on Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2004.","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A low-complexity calibration algorithm for current steering DACs\",\"authors\":\"H. Hristov\",\"doi\":\"10.1109/ISSE.2004.1490398\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper presents one possible way of improving both the static and dynamic performance of a current steering digital-to-analog converter (DAC) by calibrating the current sources in the matrix. The method uses a successive approximation register (SAR) and a high resolution current comparator. The current through the least significant bit (LSB) section sets the current of a reference generator which is then used to calibrate the matrix. To avoid the need to subtract current in the process of calibration, the LSB section is purposefully oversized with respect to the MSB section. This greatly simplifies the implementation of the current generation circuitry. The fractional calibration currents are commutated by turning off the respective cascode transistors. As the calibration is intended to take place on command, in order to compensate for temperature and component parameter drift, a dedicated signal is provided to trigger the calibration process. When the cycle is completed, an \\\"end of conversion\\\" flag is raised, allowing an easy feedback control of the DAC by an external monitoring system. The paper shows that it is possible to allow a large mismatch of the matrix transistors and still achieve good linearity. Because of the reduced size, dynamic behaviour can be improved as well. Schematic solutions for the main building blocks and simulation results are also presented.\",\"PeriodicalId\":342004,\"journal\":{\"name\":\"27th International Spring Seminar on Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2004.\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"27th International Spring Seminar on Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2004.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSE.2004.1490398\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th International Spring Seminar on Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2004.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSE.2004.1490398","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-complexity calibration algorithm for current steering DACs
The paper presents one possible way of improving both the static and dynamic performance of a current steering digital-to-analog converter (DAC) by calibrating the current sources in the matrix. The method uses a successive approximation register (SAR) and a high resolution current comparator. The current through the least significant bit (LSB) section sets the current of a reference generator which is then used to calibrate the matrix. To avoid the need to subtract current in the process of calibration, the LSB section is purposefully oversized with respect to the MSB section. This greatly simplifies the implementation of the current generation circuitry. The fractional calibration currents are commutated by turning off the respective cascode transistors. As the calibration is intended to take place on command, in order to compensate for temperature and component parameter drift, a dedicated signal is provided to trigger the calibration process. When the cycle is completed, an "end of conversion" flag is raised, allowing an easy feedback control of the DAC by an external monitoring system. The paper shows that it is possible to allow a large mismatch of the matrix transistors and still achieve good linearity. Because of the reduced size, dynamic behaviour can be improved as well. Schematic solutions for the main building blocks and simulation results are also presented.