{"title":"球栅阵列封装设计中的电气性能权衡","authors":"K.N. Wang, J. Adam, P.A. Dziekowicz","doi":"10.1109/IEMT.1995.526196","DOIUrl":null,"url":null,"abstract":"Summary form only given, as follows. Many new types of ball grid array packages have been introduced or proposed in the last year as alternatives to PQFPs and PGAs. These include single and multilayer configurations for both plastic and metal BGAs based on a variety of material and process technologies. A commonly claimed advantage of all these BGAs is improved electrical performance. With continued increases in clock speed and reductions in noise margins due to voltage scaling, electrical performance will become a driving force for introduction of BGAs in many products. A detailed study of the electrical performance of a selected set of single and multilayer BGA packages was completed. The different package models were generated using a field solver and analyzed for their signal integrity characteristics using SPICE. This includes an analysis of how closely the output signals and the input signals match under varying load conditions. The design and performance of the selected BGA packages were then assessed based on initial simulation results, and a set of design guidelines to optimize electrical performance were developed. These design guidelines can then be applied based on product needs. This paper will address the electrical performance and relative complexity and cost factors facing the engineer and suggest optimal choices for the varying load conditions and chip types.","PeriodicalId":123707,"journal":{"name":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Electrical performance trade-offs in ball grid array package designs\",\"authors\":\"K.N. Wang, J. Adam, P.A. Dziekowicz\",\"doi\":\"10.1109/IEMT.1995.526196\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given, as follows. Many new types of ball grid array packages have been introduced or proposed in the last year as alternatives to PQFPs and PGAs. These include single and multilayer configurations for both plastic and metal BGAs based on a variety of material and process technologies. A commonly claimed advantage of all these BGAs is improved electrical performance. With continued increases in clock speed and reductions in noise margins due to voltage scaling, electrical performance will become a driving force for introduction of BGAs in many products. A detailed study of the electrical performance of a selected set of single and multilayer BGA packages was completed. The different package models were generated using a field solver and analyzed for their signal integrity characteristics using SPICE. This includes an analysis of how closely the output signals and the input signals match under varying load conditions. The design and performance of the selected BGA packages were then assessed based on initial simulation results, and a set of design guidelines to optimize electrical performance were developed. These design guidelines can then be applied based on product needs. This paper will address the electrical performance and relative complexity and cost factors facing the engineer and suggest optimal choices for the varying load conditions and chip types.\",\"PeriodicalId\":123707,\"journal\":{\"name\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"volume\":\"44 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.1995.526196\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.1995.526196","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Electrical performance trade-offs in ball grid array package designs
Summary form only given, as follows. Many new types of ball grid array packages have been introduced or proposed in the last year as alternatives to PQFPs and PGAs. These include single and multilayer configurations for both plastic and metal BGAs based on a variety of material and process technologies. A commonly claimed advantage of all these BGAs is improved electrical performance. With continued increases in clock speed and reductions in noise margins due to voltage scaling, electrical performance will become a driving force for introduction of BGAs in many products. A detailed study of the electrical performance of a selected set of single and multilayer BGA packages was completed. The different package models were generated using a field solver and analyzed for their signal integrity characteristics using SPICE. This includes an analysis of how closely the output signals and the input signals match under varying load conditions. The design and performance of the selected BGA packages were then assessed based on initial simulation results, and a set of design guidelines to optimize electrical performance were developed. These design guidelines can then be applied based on product needs. This paper will address the electrical performance and relative complexity and cost factors facing the engineer and suggest optimal choices for the varying load conditions and chip types.