{"title":"基于新型混合插入策略的互连延迟优化","authors":"Xiangyuan Liu, Shuming Chen","doi":"10.1109/ICASIC.2005.1611441","DOIUrl":null,"url":null,"abstract":"Interconnection techniques play an important role in the growth of semiconductor industry into future generations. A novel hybrid insertion strategy based on repeaters and low-swing differential-signaling circuits for global interconnect is presented in this paper. It takes advantage of those circuits on driving long wires in different length, and optimally inserts them along the wires. Simulation results using HSPICE for 0.18mum process show that delay, energy, energy-delay-product (EDP) and area are considerably decreased compared with other strategies available. Moreover, it is very suitable for integration in an EDA tool flow and helpful to the reuse of low-swing differential-signaling circuits","PeriodicalId":431034,"journal":{"name":"2005 6th International Conference on ASIC","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Interconnect delay optimization using a novel hybrid insertion strategy\",\"authors\":\"Xiangyuan Liu, Shuming Chen\",\"doi\":\"10.1109/ICASIC.2005.1611441\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Interconnection techniques play an important role in the growth of semiconductor industry into future generations. A novel hybrid insertion strategy based on repeaters and low-swing differential-signaling circuits for global interconnect is presented in this paper. It takes advantage of those circuits on driving long wires in different length, and optimally inserts them along the wires. Simulation results using HSPICE for 0.18mum process show that delay, energy, energy-delay-product (EDP) and area are considerably decreased compared with other strategies available. Moreover, it is very suitable for integration in an EDA tool flow and helpful to the reuse of low-swing differential-signaling circuits\",\"PeriodicalId\":431034,\"journal\":{\"name\":\"2005 6th International Conference on ASIC\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 6th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICASIC.2005.1611441\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 6th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2005.1611441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Interconnect delay optimization using a novel hybrid insertion strategy
Interconnection techniques play an important role in the growth of semiconductor industry into future generations. A novel hybrid insertion strategy based on repeaters and low-swing differential-signaling circuits for global interconnect is presented in this paper. It takes advantage of those circuits on driving long wires in different length, and optimally inserts them along the wires. Simulation results using HSPICE for 0.18mum process show that delay, energy, energy-delay-product (EDP) and area are considerably decreased compared with other strategies available. Moreover, it is very suitable for integration in an EDA tool flow and helpful to the reuse of low-swing differential-signaling circuits