{"title":"基于自偏置多门控晶体管的高线性低噪声放大器","authors":"A. Abbasi, N. Sulaiman, R. Teymourzadeh","doi":"10.1109/ICEESE.2014.7154594","DOIUrl":null,"url":null,"abstract":"Noise level frequently set the basic limit on the smallest signal. New noise reduction technology and amplifiers voltage-noise density, yet still offer high speed, high accuracy and low power solution. Low noise amplifiers always play a significant role in RF technology. Hence in this paper, high linear low noise amplifier (LNA) using cascode self-biased multiple gated transistors (MGTR) is presented. The proposed system is covering 0.9 to 2.4 GHz applications. To verify the functionality of the proposed LNA as a bottleneck of RF technology, a cascode LNA without MGTR is implemented and synthesized. The comparison has been done with the single-gate LNA. From the synthesize result, proposed LNA obtained 10 dBm third-order input intercept point (IIP3) in compare with single-gate LNA at 9 dB gain. The proposed LNA is implemented in 90 nm CMOS technology and reported 13 dBm IIP3, 1.9 dB NF and 9 dB gain, while consuming 7.9 mW from 2 V supply.","PeriodicalId":240050,"journal":{"name":"2014 2nd International Conference on Electrical, Electronics and System Engineering (ICEESE)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"High linear low noise amplifier based on self-biasing multiple gated transistors\",\"authors\":\"A. Abbasi, N. Sulaiman, R. Teymourzadeh\",\"doi\":\"10.1109/ICEESE.2014.7154594\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Noise level frequently set the basic limit on the smallest signal. New noise reduction technology and amplifiers voltage-noise density, yet still offer high speed, high accuracy and low power solution. Low noise amplifiers always play a significant role in RF technology. Hence in this paper, high linear low noise amplifier (LNA) using cascode self-biased multiple gated transistors (MGTR) is presented. The proposed system is covering 0.9 to 2.4 GHz applications. To verify the functionality of the proposed LNA as a bottleneck of RF technology, a cascode LNA without MGTR is implemented and synthesized. The comparison has been done with the single-gate LNA. From the synthesize result, proposed LNA obtained 10 dBm third-order input intercept point (IIP3) in compare with single-gate LNA at 9 dB gain. The proposed LNA is implemented in 90 nm CMOS technology and reported 13 dBm IIP3, 1.9 dB NF and 9 dB gain, while consuming 7.9 mW from 2 V supply.\",\"PeriodicalId\":240050,\"journal\":{\"name\":\"2014 2nd International Conference on Electrical, Electronics and System Engineering (ICEESE)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 2nd International Conference on Electrical, Electronics and System Engineering (ICEESE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEESE.2014.7154594\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 2nd International Conference on Electrical, Electronics and System Engineering (ICEESE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEESE.2014.7154594","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High linear low noise amplifier based on self-biasing multiple gated transistors
Noise level frequently set the basic limit on the smallest signal. New noise reduction technology and amplifiers voltage-noise density, yet still offer high speed, high accuracy and low power solution. Low noise amplifiers always play a significant role in RF technology. Hence in this paper, high linear low noise amplifier (LNA) using cascode self-biased multiple gated transistors (MGTR) is presented. The proposed system is covering 0.9 to 2.4 GHz applications. To verify the functionality of the proposed LNA as a bottleneck of RF technology, a cascode LNA without MGTR is implemented and synthesized. The comparison has been done with the single-gate LNA. From the synthesize result, proposed LNA obtained 10 dBm third-order input intercept point (IIP3) in compare with single-gate LNA at 9 dB gain. The proposed LNA is implemented in 90 nm CMOS technology and reported 13 dBm IIP3, 1.9 dB NF and 9 dB gain, while consuming 7.9 mW from 2 V supply.