A. Tuv, Maxim S. Akatov, Diana I. Nalegach, Nikita A. Bezborodov
{"title":"基于串行接口非易失性存储器检测方法诊断特性研究的软硬件综合体开发","authors":"A. Tuv, Maxim S. Akatov, Diana I. Nalegach, Nikita A. Bezborodov","doi":"10.1109/MWENT55238.2022.9802292","DOIUrl":null,"url":null,"abstract":"This paper investigates the diagnostic abilities of test sequences developed for detecting defects in non-volatile memory with a serial interface. The most common fault models are considered, algorithms for monitoring non-volatile memory are described. A comparative analysis of the complexity of marching tests is carried out and faster control algorithms are proposed. The study was conducted as part of the development of a hardware and software complex for testing non-volatile memory. The article presents the architecture of the complex and describes the schemes for testing static parameters of memory chips.","PeriodicalId":218866,"journal":{"name":"2022 Moscow Workshop on Electronic and Networking Technologies (MWENT)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Development of a Hardware and Software Complex Based on the Study of the Diagnostic Properties of Methods for Testing Nonvolatile Memory with a Serial Interface\",\"authors\":\"A. Tuv, Maxim S. Akatov, Diana I. Nalegach, Nikita A. Bezborodov\",\"doi\":\"10.1109/MWENT55238.2022.9802292\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates the diagnostic abilities of test sequences developed for detecting defects in non-volatile memory with a serial interface. The most common fault models are considered, algorithms for monitoring non-volatile memory are described. A comparative analysis of the complexity of marching tests is carried out and faster control algorithms are proposed. The study was conducted as part of the development of a hardware and software complex for testing non-volatile memory. The article presents the architecture of the complex and describes the schemes for testing static parameters of memory chips.\",\"PeriodicalId\":218866,\"journal\":{\"name\":\"2022 Moscow Workshop on Electronic and Networking Technologies (MWENT)\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 Moscow Workshop on Electronic and Networking Technologies (MWENT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWENT55238.2022.9802292\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 Moscow Workshop on Electronic and Networking Technologies (MWENT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWENT55238.2022.9802292","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Development of a Hardware and Software Complex Based on the Study of the Diagnostic Properties of Methods for Testing Nonvolatile Memory with a Serial Interface
This paper investigates the diagnostic abilities of test sequences developed for detecting defects in non-volatile memory with a serial interface. The most common fault models are considered, algorithms for monitoring non-volatile memory are described. A comparative analysis of the complexity of marching tests is carried out and faster control algorithms are proposed. The study was conducted as part of the development of a hardware and software complex for testing non-volatile memory. The article presents the architecture of the complex and describes the schemes for testing static parameters of memory chips.