A reprogrammable FPGA-based ATM traffic generator

Markov modulated process is widely used to model ATM (Asynchronous Transmission Mode) traffic sources. We develop an approximation algorithm and design an FPGA (Field Programmable Gate Array) based circuit to generate cell trigger emulating this process. The design takes advantage of the reprogrammability of SRAM or E/sup 2/PROM FPGA. Instead of storing the process' various parameters in registers, our design "hardwires" these parameters into the circuitry and greatly simplifies the circuit complexity. Our testing circuit can be fitted into a moderate-sized FPGA chip and can generate up to 12 M triggers per second.