构建具有单片3D集成的大规模SRAM阵列

2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) Pub Date : 2017-07-24 DOI:10.1109/ISLPED.2017.8009157

J. Kong, Young-Ho Gong, S. Chung

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引用次数: 16

摘要

本文采用单片3D (monolithic 3D, M3D)集成技术构建大规模SRAM阵列。我们介绍了基于m3d的SRAM阵列，具有三种不同的集成方式:M3D-R(垂直路由)，M3D-VBL(垂直位线)和M3D-VWL(垂直字线)。我们还将基于m3d的SRAM阵列应用于最后一级缓存:eDRAM llc的标签阵列和SRAM llc的数据阵列。与基于tsv的3D SRAM阵列相比，基于m3d的SRAM阵列的LLCs性能更好，能量降低了0.02% ~ 1.7%和49.1% ~ 79.1%。

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Architecting large-scale SRAM arrays with monolithic 3D integration

In this paper, we architect large-scale SRAM arrays with monolithic 3D (M3D) integration technology. We introduce M3D-based SRAM arrays with three different ways of integration: M3D-R (vertical routing-only), M3D-VBL (vertical bitline), and M3D-VWL (vertical wordline). We also apply M3D-based SRAM arrays to last-level caches: tag arrays for eDRAM LLCs and data arrays for SRAM LLCs. The proposed LLCs with M3D-based SRAM arrays lead to better performance and lower energy by 0.02%∼1.7% and 49.1%∼79.1%, respectively, compared to that with TSV-based 3D SRAM arrays.

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来源期刊

2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)

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