The approach to design of dynamically reconfigurable arbitration units in embedded systems

Today we are seeing an intensive development of dynamically reconfigurable components in the FPGA-based embedded systems. Nevertheless, by their parameters, FPGA-based projects are essentially inferior to those that are on ASIC and the same design rules. This significantly limits applications of the FPGA-based reconfigurable systems. The paper presents relevance of dynamic reconfiguration for arbitration units in embedded systems. There is a review of existing design techniques for ASIC-based dynamically reconfigurable components. They have been also evaluated by applicability for the arbitration unit development (complex function modules for systems-on-chip and networks-on-chip). The authors have proposed the approach to the development of dynamically reconfigurable arbitration units in embedded systems. The approach makes it possible to consider specific requirements to these units.