CMOS集成电路的功率特性分析

Yongjun Xu, Chaonong Xu, Xiaowei Li
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引用次数: 0

摘要

功耗已经成为集成电路设计的主要制约因素之一,特别是对于无线通信环境和电池供电的应用。在设计阶段非常需要了解一些重要的功率信息。在期望和变异的基础上,定义了变异和期望率(VER)和最大偏斜比(MSR)两个参数来描述复杂的总功率行为。为了实现对所有这些功率特性的准确分析,在现有的动态和泄漏功率模型的基础上,提出了一种量化的实验方法,结果表明,分析环境和参数对低功耗高性能电路系统的设计非常有用
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Power property analysis for CMOS integrated circuits
Power consumption has become one of the primary constraints of integrated circuit designs, especially for wireless communication environments and battery-operated applications. Some important power information is very needed to be known in design phases. In this paper, two parameters of variation and expectation rate (VER) and maximum-skew ratio (MSR) are defined along with expectation and variation to describe the complicated total power behavioral. To achieve accurate analysis of all these power properties, a quantified experimental method is proposed based on the existing dynamic and leakage power models and the results show the analysis environment and the parameters are very useful for low power and high performance circuit system designs
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