低误差无载波定宽乘法器及其在DCT/IDCT中的应用

The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Pub Date : 2004-12-06 DOI:10.1109/APCCAS.2004.1412795

Tso-Bing Juang, Shen-Fu Hsiao, Shiann-Rong Kuang, Ming-Yu Tsai

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引用次数: 0

摘要

本文提出了一种低误差定宽冗余乘法器设计。该设计基于对经过改进的Booth编码的二进制符号数表示的截断部分积的值进行统计分析。总体截断误差显著降低，硬件开销可以忽略不计。对256级灰度图像的DCT/IDCT仿真表明，我们提出的乘法设计具有更高的PSNR/SNR。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low-error carry-free fixed-width multipliers and their application to DCT/IDCT

In this paper, we propose a low-error fixed-width redundant multiplier design. The design is based on the statistical analysis of the value of the truncated partial products in binary signed-digit representation with modified Booth encoding. The overall truncation error is significantly reduced with negligible hardware overhead. Simulation on DCT/IDCT of images with 256 gray levels shows our proposed multiplication design has higher PSNR/SNR.

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The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings.

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