高度可扩展的第二代45纳米分闸嵌入式闪存，具有10ns访问时间和1m循环续航时间

2016 IEEE 8th International Memory Workshop (IMW) Pub Date : 2016-05-15 DOI:10.1109/IMW.2016.7495275

Yong Kyu Lee, Hongkook Min, Changmin Jeon, B. Seo, Gayoung Lee, Eunkang Park, Donghyun Kim, Changhyun Park, B. Kwon, Minsu Kim, Bongsang Lee, Duckhyung Lee, Hyosang Lee, Jisung Kim, Sunghee Cho

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引用次数: 2

摘要

我们提出了一种高度可扩展的第二代45纳米分栅嵌入式闪存，它在不使用额外掩模、工艺和先进设备的情况下，将第一代45纳米嵌入式闪存的单元尺寸(与28纳米技术节点的尺寸几乎相同)缩小了40%。通过对三栅闪存结构的工艺优化和多种设计方法的实施，实现了高速运行(10ns随机存取时间、25us写入时间和小于2ms擦除操作)和高可靠性(1M周期、20保留时间)。它已在1Mb到16Mb密度的闪存ip范围内成功验证。

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Highly Scalable 2nd-Generation 45-nm Split-Gate Embedded Flash with 10-ns Access Time and 1M-Cycling Endurance

We present a highly scalable 2nd generation 45-nm split-gate embedded flash, which has been scaled of 40% unit-cell-size (almost same size with 28-nm technology node) from the 1st generation 45-nm embedded flash without using extra masks, processes and advanced-equipment. By optimizing process of triple-gate flash architecture and implementing several design methodologies, high speed operation (10ns random access time, 25us write time and less than 2ms erase operation) and robust reliability (1M cycle, 20 retention) are achieved. It has been successfully verified in range of 1Mb up to 16Mb density flash IPs.

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2016 IEEE 8th International Memory Workshop (IMW)

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