CMOS自偏置电流源的设计与测试

2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2019-11-01 DOI:10.1109/ICECS46596.2019.8965003

E. Bolzan, Elias Bühler Storck, M. C. Schneider, C. Galup-Montoro

{"title":"CMOS自偏置电流源的设计与测试","authors":"E. Bolzan, Elias Bühler Storck, M. C. Schneider, C. Galup-Montoro","doi":"10.1109/ICECS46596.2019.8965003","DOIUrl":null,"url":null,"abstract":"This paper presents the design and testing of a self-biased current source. The design described in this paper is based on the concept of inversion coefficient, which allows a direct calculation of the dispersion in the output current in terms of the internal bias errors and transistor mismatch. The circuit was fabricated in a standard CMOS 180 nm technology.","PeriodicalId":209054,"journal":{"name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Design and testing of a CMOS Self-Biased Current Source\",\"authors\":\"E. Bolzan, Elias Bühler Storck, M. C. Schneider, C. Galup-Montoro\",\"doi\":\"10.1109/ICECS46596.2019.8965003\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design and testing of a self-biased current source. The design described in this paper is based on the concept of inversion coefficient, which allows a direct calculation of the dispersion in the output current in terms of the internal bias errors and transistor mismatch. The circuit was fabricated in a standard CMOS 180 nm technology.\",\"PeriodicalId\":209054,\"journal\":{\"name\":\"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS46596.2019.8965003\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS46596.2019.8965003","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

本文介绍了一种自偏置电流源的设计与测试。本文中描述的设计基于反转系数的概念，它允许根据内部偏置误差和晶体管失配直接计算输出电流中的色散。该电路采用标准的CMOS 180纳米技术制造。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Design and testing of a CMOS Self-Biased Current Source

This paper presents the design and testing of a self-biased current source. The design described in this paper is based on the concept of inversion coefficient, which allows a direct calculation of the dispersion in the output current in terms of the internal bias errors and transistor mismatch. The circuit was fabricated in a standard CMOS 180 nm technology.

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2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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