J. Vandenbussche, K. Uyttenhove, E. Lauwers, M. Steyaert, G. Gielen
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引用次数: 17
摘要
介绍了一种8位200MS/s 4-2插值A/D转换器。为了提高系统的动态性能,设计了一种新的输入级。使用平均技术可以增强静态性能。该芯片采用标准的0.35 /spl μ m CMOS工艺制造。INL/DNL为0.95/0.8 LSB。在低频时获得了44.3 dB的信噪比:对于30 MHz的输入信号,测量到的信噪比为43 dB。
A 8-bit 200 MS/s interpolating/averaging CMOS A/D converter
A 8-bit 200MS/s 4-2 interpolating A/D converter is presented. A novel input stage was developed to enhance the dynamic performance. Static performance is enhanced using the averaging technique. The chip has been fabricated in a standard 0.35 /spl mu/m CMOS process. An INL/DNL of 0.95/0.8 LSB was measured. An SNR figure of 44.3 dB was achieved at low frequencies: for a 30 MHz input signal an SNR figure of 43 dB was measured.