存储区域网络中用于千兆I/O通信的SERDES技术

4th IEEE International Workshop on System-on-Chip for Real-Time Applications Pub Date : 2004-07-19 DOI:10.1109/IWSOC.2004.1319888

K. Iniewski, R. Badalone, M. Lapointe, M. Syrzycki

{"title":"存储区域网络中用于千兆I/O通信的SERDES技术","authors":"K. Iniewski, R. Badalone, M. Lapointe, M. Syrzycki","doi":"10.1109/IWSOC.2004.1319888","DOIUrl":null,"url":null,"abstract":"The paper reviews SERDES technology for storage area networking. A concept of a data switch is introduced to illustrate important role played by switching and backplane SERDES ICs. Selected state-of-the-art devices: 10 Gb/s line side SERDES and backplane drivers are discussed in detail. Particular emphasis is placed on challenges associated with design of high-speed mixed-signal circuitry.","PeriodicalId":306688,"journal":{"name":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","volume":"98 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-07-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"SERDES technology for gigabit I/O communications in storage area networking\",\"authors\":\"K. Iniewski, R. Badalone, M. Lapointe, M. Syrzycki\",\"doi\":\"10.1109/IWSOC.2004.1319888\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper reviews SERDES technology for storage area networking. A concept of a data switch is introduced to illustrate important role played by switching and backplane SERDES ICs. Selected state-of-the-art devices: 10 Gb/s line side SERDES and backplane drivers are discussed in detail. Particular emphasis is placed on challenges associated with design of high-speed mixed-signal circuitry.\",\"PeriodicalId\":306688,\"journal\":{\"name\":\"4th IEEE International Workshop on System-on-Chip for Real-Time Applications\",\"volume\":\"98 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-07-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"4th IEEE International Workshop on System-on-Chip for Real-Time Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWSOC.2004.1319888\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"4th IEEE International Workshop on System-on-Chip for Real-Time Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2004.1319888","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 4

摘要

本文综述了用于存储区域网络的SERDES技术。介绍了数据交换的概念，以说明交换和背板SERDES ic所起的重要作用。选择最先进的器件:详细讨论了10gb /s线侧SERDES和背板驱动器。特别强调的是与高速混合信号电路设计相关的挑战。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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SERDES technology for gigabit I/O communications in storage area networking

The paper reviews SERDES technology for storage area networking. A concept of a data switch is introduced to illustrate important role played by switching and backplane SERDES ICs. Selected state-of-the-art devices: 10 Gb/s line side SERDES and backplane drivers are discussed in detail. Particular emphasis is placed on challenges associated with design of high-speed mixed-signal circuitry.

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4th IEEE International Workshop on System-on-Chip for Real-Time Applications

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