使用28nm SRAM 6T位单元的序列相关挑战响应PUF

2017 Symposium on VLSI Circuits Pub Date : 2017-06-05 DOI:10.23919/VLSIC.2017.8008504

Supreet Jeloka, Kaiyuan Yang, M. Orshansky, D. Sylvester, D. Blaauw

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引用次数: 38

摘要

通常，SRAM puf仅用于芯片ID。所提出的序列依赖PUF将SRAM PUF的挑战-响应空间扩展了一个数量级(序列长度-1)，使其适合于身份验证。此外，它具有序列依赖的非线性行为，使其对机器学习攻击更具免疫力。在28nm，基于64×64 sram的PUF的位面积为388F2，在0.6V时能量范围为30fJ/bit - 88fj /bit。它还提供高吞吐量，在0.9V时从2.2Gbps到6.8Gbps。

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A sequence dependent challenge-response PUF using 28nm SRAM 6T bit cell

Conventionally, SRAM PUFs are only used for chip ID. The proposed sequence dependent PUF expands the challenge-response space of an SRAM PUF by an order of rows(sequence length-1), making it suitable for authentication. In addition, it has a sequence dependent non-linear behavior making it more immune to machine learning attacks. In 28nm, the 64×64 SRAM-based PUF has a bit area of 388F2 with energy ranging from 30fJ/bit–88fJ/bit at 0.6V. It also provides high throughput, from 2.2Gbps to 6.8Gbps at 0.9V.

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2017 Symposium on VLSI Circuits

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