D. Saynova, V. Mihailetchi, L. J. Geerligs, A. Weeber
{"title":"网印铝合金后结大面积n型和p型硅片上高效太阳能电池的比较","authors":"D. Saynova, V. Mihailetchi, L. J. Geerligs, A. Weeber","doi":"10.1109/PVSC.2008.4922760","DOIUrl":null,"url":null,"abstract":"Low-cost, high-efficiency, and large area n-type silicon cells can be processed based on the screen printed Aluminum-alloyed rear junction concept. This process uses fabrication techniques which are very close to the current industry-standard screen printed mc-Si cell process. We compare, by experimental tests and modeling, the differences of using n-type wafers and p-type wafers with this process. An independently confirmed record-high efficiency of 17.4% is achieved on n-type floatzone (FZ) silicon wafers (area 140 cm2). On p-type FZ wafers, with the same process 17.6% is obtained, and 16.8% on p-type Cz wafers. Model calculations allow us to identify the potential for further enhancement of the n-type cell efficiency to slightly above 18.0% by improving front surface passivation. We also discuss experimental characteristics of cells produced by this process from n-type multicrystalline wafers.","PeriodicalId":330521,"journal":{"name":"2008 33rd IEEE Photovoltaic Specialists Conference","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Comparison of high efficiency solar cells on large area n-type and p-type silicon wafers with screen-printed Aluminum-alloyed rear junction\",\"authors\":\"D. Saynova, V. Mihailetchi, L. J. Geerligs, A. Weeber\",\"doi\":\"10.1109/PVSC.2008.4922760\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Low-cost, high-efficiency, and large area n-type silicon cells can be processed based on the screen printed Aluminum-alloyed rear junction concept. This process uses fabrication techniques which are very close to the current industry-standard screen printed mc-Si cell process. We compare, by experimental tests and modeling, the differences of using n-type wafers and p-type wafers with this process. An independently confirmed record-high efficiency of 17.4% is achieved on n-type floatzone (FZ) silicon wafers (area 140 cm2). On p-type FZ wafers, with the same process 17.6% is obtained, and 16.8% on p-type Cz wafers. Model calculations allow us to identify the potential for further enhancement of the n-type cell efficiency to slightly above 18.0% by improving front surface passivation. We also discuss experimental characteristics of cells produced by this process from n-type multicrystalline wafers.\",\"PeriodicalId\":330521,\"journal\":{\"name\":\"2008 33rd IEEE Photovoltaic Specialists Conference\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-05-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 33rd IEEE Photovoltaic Specialists Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PVSC.2008.4922760\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 33rd IEEE Photovoltaic Specialists Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PVSC.2008.4922760","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Comparison of high efficiency solar cells on large area n-type and p-type silicon wafers with screen-printed Aluminum-alloyed rear junction
Low-cost, high-efficiency, and large area n-type silicon cells can be processed based on the screen printed Aluminum-alloyed rear junction concept. This process uses fabrication techniques which are very close to the current industry-standard screen printed mc-Si cell process. We compare, by experimental tests and modeling, the differences of using n-type wafers and p-type wafers with this process. An independently confirmed record-high efficiency of 17.4% is achieved on n-type floatzone (FZ) silicon wafers (area 140 cm2). On p-type FZ wafers, with the same process 17.6% is obtained, and 16.8% on p-type Cz wafers. Model calculations allow us to identify the potential for further enhancement of the n-type cell efficiency to slightly above 18.0% by improving front surface passivation. We also discuss experimental characteristics of cells produced by this process from n-type multicrystalline wafers.