{"title":"OFDM自适应调制系统的FPGA实现","authors":"J. Veillcux, P. Fortier, S. Roy","doi":"10.1109/NEWCAS.2005.1496672","DOIUrl":null,"url":null,"abstract":"This paper investigates the hardware and architecture requirements for an OFDM adaptive modulation system. The hardware modules for a baseband adaptive uncoded OFDM transmitter, receiver and feedback link have been implemented on an FPGA. This system is used for fast hardware-in-the-loop simulation when combined with the implementation of a wireless channel model. It is also demonstrated that one high-end FPGA chip can provide all the resources necessary for the implementation of the system.","PeriodicalId":131387,"journal":{"name":"The 3rd International IEEE-NEWCAS Conference, 2005.","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"An FPGA implementation of an OFDM adaptive modulation system\",\"authors\":\"J. Veillcux, P. Fortier, S. Roy\",\"doi\":\"10.1109/NEWCAS.2005.1496672\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper investigates the hardware and architecture requirements for an OFDM adaptive modulation system. The hardware modules for a baseband adaptive uncoded OFDM transmitter, receiver and feedback link have been implemented on an FPGA. This system is used for fast hardware-in-the-loop simulation when combined with the implementation of a wireless channel model. It is also demonstrated that one high-end FPGA chip can provide all the resources necessary for the implementation of the system.\",\"PeriodicalId\":131387,\"journal\":{\"name\":\"The 3rd International IEEE-NEWCAS Conference, 2005.\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-06-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The 3rd International IEEE-NEWCAS Conference, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NEWCAS.2005.1496672\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The 3rd International IEEE-NEWCAS Conference, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS.2005.1496672","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An FPGA implementation of an OFDM adaptive modulation system
This paper investigates the hardware and architecture requirements for an OFDM adaptive modulation system. The hardware modules for a baseband adaptive uncoded OFDM transmitter, receiver and feedback link have been implemented on an FPGA. This system is used for fast hardware-in-the-loop simulation when combined with the implementation of a wireless channel model. It is also demonstrated that one high-end FPGA chip can provide all the resources necessary for the implementation of the system.