10A 12V 1芯片数字控制DC/DC转换器集成电路,具有高分辨率和高频DPWM

K. Nakamura, T. Naka, Y. Kamata, T. Taguchi, T. Shimizu, Y. Ikeda, A. Nakagawa, D. Maksimović
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引用次数: 5

摘要

本文介绍了一种基于低成本0.6 um BiCD工艺的10a 12v单片机数字控制DC/DC变换器集成电路。该集成电路包括具有死区可编程性的数字脉宽调制器(DPWM)模块。时钟频率为25mhz时,平均时间分辨率为1.22 ns。该分辨率与时钟频率为817 MHz的基于计数器的DPWM相同。该芯片采用了低阻抗金属碰撞技术,降低了功率级的寄生互连电阻。该芯片在20 V输出LDMOS(漏极电流=5 a,栅极电压=5 V)下实现了低导通电阻9.7 mOmega,当输入电压为12 V,输出电压为1.3 V,开关频率为780 KHz,死区时间为15 ns时,输出电流为5 a,效率最高为86.4%。在阶跃负载(5 ~ 10 A)瞬态响应中,最大电压偏差和瞬态响应时间分别为42 mV和8 us。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
10A 12V 1 chip digitally-controlled DC/DC converter IC with high resolution and high frequency DPWM
This paper introduces a 10 A 12 V single chip digitally-controlled DC/DC converter IC based on the low cost 0.6 um BiCD process. This IC includes the digital pulse width modulator (DPWM) module with the dead-time programmability. The average time resolution is 1.22 ns at the clock frequency 25 MHz on 0.6 um process. This resolution is as same as that for the counter-based DPWM with the clock frequency 817 MHz. The chip adopted low impedance metal bump technology for reducing a parasitic interconnection resistance in the power stage. The fabricated chip achieves a low on resistance 9.7 mOmega in the 20 V output LDMOS (@drain current=5 A, gate voltage=5 V). The maximum efficiency is 86.4% at output current 5 A when the input voltage, the output voltage and switching frequency and the dead-time are 12 V, 1.3 V, 780 KHz and 15 ns, respectively. The maximum voltage deviation and transient response time are 42 mV and 8 us, respectively in step-load (5 A to 10 A) transient response.
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