ic的高速TLP和ESD特性

K. Muhonen, E. Grund, R. Ashton
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引用次数: 3

摘要

静电放电一直是集成电路可靠性和生产中关注的问题。为了设计有效的ESD钳,了解在ESD事件中钳的开启和工作方式至关重要。这不能用s参数或任何其他类型的典型RF表征来完成。传输线脉冲(TLP)是一种高速系统,它以非常短的平坦脉冲(典型为100 ns)模拟ESD事件。这允许在类似esd的事件中对被测件的电压和电流进行现场测量。本文将介绍TLP的原理(基于时域反射)、结构和用途。将回顾不同的张力腿平台配置,并讨论每种配置的被测段响应的IV曲线。将解释在时域内进行的校准和校正。这些提供电压和电流参考。将讨论张力腿负载线的重要性及其在DUT开闸和回闸表征中的应用。最后,介绍了短于10 ns的脉冲表征,非常快速的TLP,以及其精确校准的障碍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High-Speed TLP and ESD Characterization of ICs
Electrostatic discharge is always an area of concern in reliability and production of ICs. To design effective ESD clamps, knowing how the clamp turns on and operates during an ESD event is critical. This cannot be done with S-parameters or any other type of typical RF characterization. Transmission Line Pulsing, TLP, is a high-speed system that mimics an ESD event with a very short flat pulse (100 ns is typical). This allows in situ measurement of the voltage and current at the DUT during an ESD-like event. This paper will give an introduction into the theory (which is based on time domain reflection), configuration and uses of TLP. Different TLP configurations will be reviewed, and each configuration an IV curve for the DUT response is discussed. Calibration and correction will be explained which are done in the time domain. These provide the voltage and current references. The importance of the TLP load line will be discussed and its application to DUT characterization of turn-on and snap-back. Finally, characterization with pulses shorter than 10 ns, Very Fast TLP, are presented and its hurdles to accurate calibration.
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