一种用于图像对比度增强的并行模拟CMOS信号处理器

ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI:10.1109/ESSCIRC.1992.5468271

T. Shimmi, H. Kobayashi, Tetsuya Yagi, T. Sawaji, T. Matsumoto, Asad A. Abidi

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引用次数: 21

摘要

利用一组53 × 52的嵌入式光传感器阵列实现了一种近似高斯拉普拉斯函数的二维模拟CMOS网络。实验结果表明，通过精心的电路设计，可以在模拟电路中获得简单物体图像的高质量对比度增强。7.9 × 9.2 mm IC从5v电源耗散350mw。

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A Parallel Analog CMOS Signal Processor for Image Contrast Enhancement

A 2D analog CMOS network with a 53 × 52 array of embedded photosensors implements a convolution function approximating the Laplacian of a Gaussian. Experimental results verify that high quality contrast enhancement of images of simple objects may be obtained in analog circuits with careful circuit design. The 7.9 × 9.2 mm IC dissipates 350 mW from a 5 V power supply.

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ESSCIRC '92: Eighteenth European Solid-State Circuits conference

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