用于高并行光数据链路的低功耗、高速InGaAs/InP光接收器

GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995 Pub Date : 1995-09-01 DOI:10.1109/GAAS.1995.528989

M. L. Lovejoy, G. Patrizi, P. Enquist, B. H. Rose, D. Slater, R. Shul, R. F. Carson, D. Craft, D. Rieger, J. Hutchby

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引用次数: 5

摘要

基于InGaAs/InP异质结双极晶体管(HBTs)和p-i-n二极管的高并行光数据链路低功耗光接收器已被设计、制造和表征。接收器的工作范围为980 nm至超过1.3 /spl mu/m，并直接与3.3 V CMOS接口。SPICE用于研究电路拓扑结构，以最大限度地降低功耗，同时保持与CMOS直接接口所需的大信号运算。在高达800 mbit /s的比特率下，实现了/spl sim/10 mW/通道的低功耗。本文报道了用p-i-n/HBT电路制作的分立HBT和低功率光电接收器的性能特性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Low-power, high-speed InGaAs/InP photoreceiver for highly-parallel optical data links

Low-power photoreceivers based on InGaAs/InP heterojunction bipolar transistors (HBTs) and p-i-n diodes for highly-parallel optical data links have been designed, fabricated and characterized. The receivers are designed to operate from 980 nm to over 1.3 /spl mu/m and interface directly with 3.3 V CMOS. SPICE was utilized to investigate circuit topographies that minimize power dissipation while maintaining large signal operation required to interface directly with CMOS. Low-power dissipation of /spl sim/10 mW/channel has been achieved at bit rates up to 800 Mbits/sec. Performance characteristics of discrete HBTs and of low-power photoreceivers fabricated with p-i-n/HBT circuits are reported.

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来源期刊

GaAs IC Symposium IEEE Gallium Arsenide Integrated Circuit Symposium 17th Annual Technical Digest 1995

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