{"title":"一个现实的闪存故障模型","authors":"Yea-Ling Horng, Jing-Reng Huang, Tsin-Yuan Chang","doi":"10.1109/ATS.2000.893637","DOIUrl":null,"url":null,"abstract":"To explore all faulty behavior on NAND-type flash memory is impractical, and the defects in the SPICE model level are considered. In this paper, two SPICE models of the flash cell are developed and used for circuit-level faulty behavior simulation. The faulty behaviors can be classified to six types and applied for the fault modeling or testing of NAND-type flash memory.","PeriodicalId":403864,"journal":{"name":"Proceedings of the Ninth Asian Test Symposium","volume":"58 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A realistic fault model for flash memories\",\"authors\":\"Yea-Ling Horng, Jing-Reng Huang, Tsin-Yuan Chang\",\"doi\":\"10.1109/ATS.2000.893637\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To explore all faulty behavior on NAND-type flash memory is impractical, and the defects in the SPICE model level are considered. In this paper, two SPICE models of the flash cell are developed and used for circuit-level faulty behavior simulation. The faulty behaviors can be classified to six types and applied for the fault modeling or testing of NAND-type flash memory.\",\"PeriodicalId\":403864,\"journal\":{\"name\":\"Proceedings of the Ninth Asian Test Symposium\",\"volume\":\"58 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-12-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Ninth Asian Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.2000.893637\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Ninth Asian Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2000.893637","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
To explore all faulty behavior on NAND-type flash memory is impractical, and the defects in the SPICE model level are considered. In this paper, two SPICE models of the flash cell are developed and used for circuit-level faulty behavior simulation. The faulty behaviors can be classified to six types and applied for the fault modeling or testing of NAND-type flash memory.
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