Formal Hardware Verification: A Users' View Summary

Formal verification questions are often formulated in one of two forms. First, called “property check”, is between a property p and a model M of a design, and is posed as “Is p true of M?” Second, called “implementation check”, is between models MI and M2 of two designs and is posed as “Is M2 an implementation of MI?’ employs one of three techniques, namely: theorem proving, model checking, and equivalence checking. Theorem proving is the most general of these techniques, has a steep learning curve, and its use in hardware verification is still