A time digitizer based on multiphase clock implemented in FPGA device

We present the design, operation and test results of a time-to-digital converter based on multiphase clock and implemented in Kintex-7 FPGA (Xilinx). Proposed solution involves a Vernier delay line constructed with the use of Look-Up Tables and interconnect resources. Taking advantage of rising amount of available interconnect resources in modern FPGA devices a various number of phase segments in multiphase clock can be obtained with relatively high uniformity. The solution with 6, 8, 13 and 15 phases is presented and full PVT variation tests are performed and discussed.