基于动态频率缩放的三维多核处理器热分析

Young Jin Park, Min Zeng, Byeong-Seok Lee, Jeong-A Lee, S. Kang, C. Kim
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引用次数: 11

摘要

随着处理器技术的规模化,互连成为设计多核处理器时的性能瓶颈。3D集成电路是一种很好的解决方案,可以通过tsv连接的多层堆叠来降低多核处理器的互连延迟。然而,3D技术放大了3D多核处理器的热挑战。因此,如果没有有效的DFS等热问题的解决方案,3D多核架构就无法实现。本文研究了连续啮合DFS技术如何在单元级上处理三维多核处理器的热问题。当考虑到热问题时,我们还确定了最佳矩阵,以实现不同应用特性,冷却特性和频率水平的最佳性能。实验结果得出了模具,特别是IntReg单元的温度管理和平衡的两条规律:1)为了优化两个模具的热分布,冷却效率较高的模具应采用较高的频率;2)为了降低IntReg机组的温度,应将热冲击较大的工作分配给冷却效率较高的核心。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Thermal Analysis for 3D Multi-core Processors with Dynamic Frequency Scaling
As the process technology scales down, interconnects become the performance bottleneck when designing multi-core processors. 3D IC can be a good solution for reducing the interconnection delay in the multi-core processors by stacking multiple layers connected through TSVs. However, 3D technology magnifies the thermal challenges in 3D multi-core processors. For this reason, 3D multi-core architecture cannot be practical without proper solutions to the thermal problems such as efficient DFS. This paper investigates how the continuous engaged DFS technique handles the thermal problem on 3D multi-core processors in unit level. We also identify the optimal matrix to achieve best performance varying application features, cooling characteristics, and frequency levels when the thermal problem is considered. Experimental results conclude two rules for managing and balancing the temperature of the die, especially the IntReg unit: 1) To optimize the thermal profile of both dies, the die with higher cooling efficiency should be clocked at a higher frequency; and 2) To lower the temperature of IntReg unit, workload with higher thermal impact should be assigned to cores with higher cooling efficiency.
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