{"title":"基于硬件的性能增强保证缓存","authors":"Y. Huangfu, Wei Zhang","doi":"10.1109/ISORC.2015.11","DOIUrl":null,"url":null,"abstract":"Cache memories are widely used in microprocessors to improve the average-case memory performance. However, they are harmful to time predictability, and thus may not be desirable for real-time systems. In this paper, we make simple hardware extensions of a regular cache to implement the performance enhancement guaranteed cache (PEG-C). The PEG-C is totally controlled by hardware, which can automatically improve the average-case performance of real-time software with guaranteed and enhanced worst-case performance.","PeriodicalId":294446,"journal":{"name":"2015 IEEE 18th International Symposium on Real-Time Distributed Computing","volume":"73 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Hardware-Based Performance Enhancement Guaranteed Caches\",\"authors\":\"Y. Huangfu, Wei Zhang\",\"doi\":\"10.1109/ISORC.2015.11\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Cache memories are widely used in microprocessors to improve the average-case memory performance. However, they are harmful to time predictability, and thus may not be desirable for real-time systems. In this paper, we make simple hardware extensions of a regular cache to implement the performance enhancement guaranteed cache (PEG-C). The PEG-C is totally controlled by hardware, which can automatically improve the average-case performance of real-time software with guaranteed and enhanced worst-case performance.\",\"PeriodicalId\":294446,\"journal\":{\"name\":\"2015 IEEE 18th International Symposium on Real-Time Distributed Computing\",\"volume\":\"73 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-04-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 18th International Symposium on Real-Time Distributed Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISORC.2015.11\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 18th International Symposium on Real-Time Distributed Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISORC.2015.11","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Cache memories are widely used in microprocessors to improve the average-case memory performance. However, they are harmful to time predictability, and thus may not be desirable for real-time systems. In this paper, we make simple hardware extensions of a regular cache to implement the performance enhancement guaranteed cache (PEG-C). The PEG-C is totally controlled by hardware, which can automatically improve the average-case performance of real-time software with guaranteed and enhanced worst-case performance.
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