Additive cellular automata as an on-chip test pattern generator

Cellular Automata (CA) has been already proposed for generation of pseudo-random, pseudo-exhaustive and two-pattern test vectors. In the present work, a new concept of intermediate boundary CA has been projected that circumvents the problems associated with the generation of pseudo-random patterns using null and periodic boundary CA. Generation of an arbitrary set of deterministic test patterns for combinational logic is next investigated. Evaluating the given pattern set as a pseudo-noise (PN) sequence, a CA can be identified that generates the pattern set with minimal overhead. The best possible CA is picked up based on the analytical study of phaseshift analysis of various CA stages. Experimental results establishes this scheme as the desirable alternative to the conventional 'store and generate' schemes.<>