fpga上流处理管道的自动生成和编排

Kaspar Mätas, Kristiyan Manev, Joseph Powell, Dirk Koch
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引用次数: 0

摘要

fpga在满足流处理模型和直接模块对模块通信的工作负载方面具有显著的性能和能效优势。然而,当数据流处理系统需要适应运行条件时,现有的静态加速解决方案是有限的。为了更好地在动态场景中使用fpga,本文建议使用部分重构将不同的物理实现的操作符模块拼接在一起。我们的系统不是使用指定的模块插槽,而是将所有模块和路由线放置在一个共享区域,有更多的放置选择,以最大限度地减少碎片。此外,我们使用了一个模块库,该模块库在考虑配置成本的同时提供了不同的资源和性能权衡,以实现更快的执行。我们的系统在调度多个加速请求和对最终用户透明地管理所有约束的同时,找到最优的模块集。我们证明了中间件足够快,可以在运行时组成加速器管道,在处理小数据集时,端到端执行时间等于手工制作的静态系统。对于大型数据集,我们发现在使用我们的运行时方法时,执行速度比静态系统快7.2倍。我们举例说明了我们的数据库加速方法,其中整个动态FPGA加速是通过直接执行SQL查询推断出来的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Automated Generation and Orchestration of Stream Processing Pipelines on FPGAs
FPGAs have demonstrated substantial performance and energy efficiency advantages for workloads that fit a stream processing model with direct module-to-module communication. However, when the dataflow processing system is required to adapt to runtime conditions, current static acceleration solutions are limited. To better use FPGAs in dynamic scenarios, this paper proposes using partial reconfiguration to stitch together different physically implemented operator modules on-the-fly. Rather than using designated module slots, our system places all modules and routing wires into a shared region with more placement options to minimize fragmentation. Furthermore, we use a module library that provides different resource and performance trade-offs for faster execution while considering the configuration cost. Our system finds the optimal set of modules while scheduling multiple acceleration requests and managing all constraints transparently to the end-user. We demonstrate that the middleware is fast enough to compose accelerator pipelines at runtime with end-to- end execution times equal to hand-crafted static systems when processing small datasets. For large datasets, we found up to 7.2 x faster execution over static systems when using our runtime methods. We exemplified our approach for database acceleration, where the whole dynamic FPGA acceleration is inferred by directly executing SQL queries.
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