{"title":"0402和0204陶瓷芯片电容器在封装上去耦应用的选择标准和权衡","authors":"B. Young","doi":"10.1109/EPEP.2007.4387160","DOIUrl":null,"url":null,"abstract":"A comprehensive sweep of detailed time-domain simulations using 3D PEEC models of the package and PCB are used to map out the design space and to set performance expectations for 0402 and 0204 ceramic chip capacitors for use as on-package decoupling capacitors.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Selection Criteria and Tradeoffs for 0402 and 0204 Ceramic Chip Capacitors for On-Package Decoupling Applications\",\"authors\":\"B. Young\",\"doi\":\"10.1109/EPEP.2007.4387160\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A comprehensive sweep of detailed time-domain simulations using 3D PEEC models of the package and PCB are used to map out the design space and to set performance expectations for 0402 and 0204 ceramic chip capacitors for use as on-package decoupling capacitors.\",\"PeriodicalId\":402571,\"journal\":{\"name\":\"2007 IEEE Electrical Performance of Electronic Packaging\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Electrical Performance of Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.2007.4387160\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Electrical Performance of Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2007.4387160","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Selection Criteria and Tradeoffs for 0402 and 0204 Ceramic Chip Capacitors for On-Package Decoupling Applications
A comprehensive sweep of detailed time-domain simulations using 3D PEEC models of the package and PCB are used to map out the design space and to set performance expectations for 0402 and 0204 ceramic chip capacitors for use as on-package decoupling capacitors.
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