{"title":"用于通信应用的单片多处理器DSP解决方案","authors":"D. Regenold","doi":"10.1109/ASIC.1994.404525","DOIUrl":null,"url":null,"abstract":"This paper presents an overview of an architecture for a single-chip multiprocessor DSP solution for communications applications. The integrated circuit was designed to handle the protocol and data-pump functions necessary to implement high-speed modem and audio tasks. The chip consists of a 186 microcontroller with two Digital Signal Processing (DSPs) coprocessors. It interfaces with a standard 186 bus and has a port for communicating with a custom CODEC, the 80127.<<ETX>>","PeriodicalId":354289,"journal":{"name":"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit","volume":"117 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-09-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A single-chip multiprocessor DSP solution for communications applications\",\"authors\":\"D. Regenold\",\"doi\":\"10.1109/ASIC.1994.404525\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an overview of an architecture for a single-chip multiprocessor DSP solution for communications applications. The integrated circuit was designed to handle the protocol and data-pump functions necessary to implement high-speed modem and audio tasks. The chip consists of a 186 microcontroller with two Digital Signal Processing (DSPs) coprocessors. It interfaces with a standard 186 bus and has a port for communicating with a custom CODEC, the 80127.<<ETX>>\",\"PeriodicalId\":354289,\"journal\":{\"name\":\"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit\",\"volume\":\"117 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-09-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1994.404525\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1994.404525","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A single-chip multiprocessor DSP solution for communications applications
This paper presents an overview of an architecture for a single-chip multiprocessor DSP solution for communications applications. The integrated circuit was designed to handle the protocol and data-pump functions necessary to implement high-speed modem and audio tasks. The chip consists of a 186 microcontroller with two Digital Signal Processing (DSPs) coprocessors. It interfaces with a standard 186 bus and has a port for communicating with a custom CODEC, the 80127.<>
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