反向门控SOI技术:功率自适应逻辑和使用相同处理的非易失性存储器

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI:10.1109/ESSDER.2004.1356545

U. Avci, A. Kumar, Haitao Liu, S. Tiwari

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引用次数: 6

摘要

报道了一种后门控可扩展绝缘体上硅(SOI)技术，该技术提供了一种非易失性存储器，具有自适应功率性能权衡和埋藏互连的逻辑。后门方法具有以下特点:(1)逻辑晶体管的阈值电压调制允许数字和模拟电路的自适应功率控制，(2)非易失性存储器，其中读晶体管缩放与存储约束解耦，(3)良好的SOI厚度控制，(4)由于校准公差低于16%而导致的速度下降，(5)一种新的模拟设计方法，在数字约束下实现自适应低压操作。

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Back-gated SOI technology: power-adaptive logic and non-volatile memory using identical processing

A back-gated scalable silicon-on-insulator (SOI) technology that provides a non-volatile memory, logic with adaptive power-performance trade-off and buried interconnectivity is reported. The back-gate approach has the following characteristics: (1) a logic transistor whose threshold voltage modulation allows adaptive power control of digital and analog circuits, (2) a non-volatile memory where the read-transistor scaling is decoupled from storage constraints, (3) good SOI thickness control, (4) speed degradation due to alignment tolerances lower than 16%, (5) a new analog design approach to achieve adaptive low voltage operation within digital constraints.

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Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)

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