{"title":"利用冗余电路的5V 64K EPROM","authors":"V. McKenny","doi":"10.1109/ISSCC.1980.1156043","DOIUrl":null,"url":null,"abstract":"A static 300ns, 200mW 64K EPROM, using a small floating gate type cell, together with yield-optimizing redundant circuitry, for matrix, column decoders, sense amplifiers and input data buffers, will be reported.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"A 5V 64K EPROM utilizing redundant circuitry\",\"authors\":\"V. McKenny\",\"doi\":\"10.1109/ISSCC.1980.1156043\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A static 300ns, 200mW 64K EPROM, using a small floating gate type cell, together with yield-optimizing redundant circuitry, for matrix, column decoders, sense amplifiers and input data buffers, will be reported.\",\"PeriodicalId\":229101,\"journal\":{\"name\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1980.1156043\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1980.1156043","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A static 300ns, 200mW 64K EPROM, using a small floating gate type cell, together with yield-optimizing redundant circuitry, for matrix, column decoders, sense amplifiers and input data buffers, will be reported.
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