时序电路的两相故障仿真方案

Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS) Pub Date : 1993-11-16 DOI:10.1109/ATS.1993.398780

Wen Ching Wu, Chung-Len Lee, Jwu-E Chen

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引用次数: 2

摘要

提出了一种时序电路的两相故障仿真方案。该方案首先对若干初始模式进行真值模拟，然后对其余模式进行故障模拟。采用故障仿真方法，可以方便、快速地识别和早期排除一些需要大量仿真时间的故障。因此，在仿真时间上获得了显著的加速。讨论了在故障模拟中出现问题的5个故障实例。

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A two-phase fault simulation scheme for sequential circuits

A two-phase fault simulation scheme for sequential circuits is proposed. The scheme is done by first performing the true value simulation with several initial patterns and then by performing the fault simulation with the rest of patterns. With the fault simulation approach, some faults which consume much simulation time can be easily and quickly identified and dropped early. As a result, significant speedup on simulation time is obtained. Five cases of faults which cause problems in fault simulation are also discussed.<>

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Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)

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