{"title":"符号仿真技术——最新技术及其应用","authors":"C. Blank, H. Eveking, Jens Levihn, G. Ritter","doi":"10.1109/HLDVT.2001.972806","DOIUrl":null,"url":null,"abstract":"A number of different techniques of symbolic simulation in particular at the behavioral and structural rt-level are classified. The principles of the TUD Symbolic Simulator used for equivalence checking are briefly outlined. The application of the tool to property checking is demonstrated. Experimental results with input languages Esterel and C are given.","PeriodicalId":188469,"journal":{"name":"Sixth IEEE International High-Level Design Validation and Test Workshop","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Symbolic simulation techniques-state-of-the-art and applications\",\"authors\":\"C. Blank, H. Eveking, Jens Levihn, G. Ritter\",\"doi\":\"10.1109/HLDVT.2001.972806\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A number of different techniques of symbolic simulation in particular at the behavioral and structural rt-level are classified. The principles of the TUD Symbolic Simulator used for equivalence checking are briefly outlined. The application of the tool to property checking is demonstrated. Experimental results with input languages Esterel and C are given.\",\"PeriodicalId\":188469,\"journal\":{\"name\":\"Sixth IEEE International High-Level Design Validation and Test Workshop\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-12-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Sixth IEEE International High-Level Design Validation and Test Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HLDVT.2001.972806\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Sixth IEEE International High-Level Design Validation and Test Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2001.972806","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Symbolic simulation techniques-state-of-the-art and applications
A number of different techniques of symbolic simulation in particular at the behavioral and structural rt-level are classified. The principles of the TUD Symbolic Simulator used for equivalence checking are briefly outlined. The application of the tool to property checking is demonstrated. Experimental results with input languages Esterel and C are given.