高阶分层平面图的面积优化

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors Pub Date : 1991-10-14 DOI:10.1109/ICCD.1991.139963

Khe-Sing The, D. F. Wong

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引用次数: 7

摘要

平面面积优化问题是在平面拓扑给定的情况下，确定各模块的尺寸。我们的目标是尽量减少最终平面图的面积。提出了一种通用分层平面图的算法。非切片配置的形状曲线是通过对平面图的图形表示的操作来构造的。形状曲线的点是通过同时减少垂直邻接图的所有最长路径的长度来确定的，使用最小切割技术。该算法适用于高阶的分层平面图和具有无限可能维度集的模块。

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Area optimization for higher order hierarchical floorplans

The floorplan area optimization problem is to determine the dimensions of each module when the topology of the floorplan is given. The objective is to minimize the area of the resulting floorplan. An algorithm for general hierarchical floorplans is presented. The shape curves for non-slicing configurations are constructed by operations on the graph representations of the floorplan. The points of a shape curve are determined by simultaneously reducing the length of all longest paths of the vertical adjacency graph, using a minimum cut technique. The algorithm is applicable to hierarchical floorplans of high order and to modules with an infinite set of possible dimensions.<>

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[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors

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