{"title":"三阶数字σ - δ调制器的稳定性分析","authors":"A. Sadik, Z. M. Hussain, X. Yu","doi":"10.1109/APCC.2006.255855","DOIUrl":null,"url":null,"abstract":"The stability of a high-order sigma-delta modulator has been addressed under dc input. A new approach for stability analysis is proposed. A nonlinear circle map is suggested to model the dynamics of the modulator. The stability problem is handled using an analogy between the dynamics of the sigma-delta modulator and the sinusoidal digital phase-locked loop (DPLL). An approximate fixed point solution is presented and stability criteria are derived","PeriodicalId":205758,"journal":{"name":"2006 Asia-Pacific Conference on Communications","volume":"460 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Stability Analysis Of A Third-Order Digital Sigma-Delta Modulator\",\"authors\":\"A. Sadik, Z. M. Hussain, X. Yu\",\"doi\":\"10.1109/APCC.2006.255855\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The stability of a high-order sigma-delta modulator has been addressed under dc input. A new approach for stability analysis is proposed. A nonlinear circle map is suggested to model the dynamics of the modulator. The stability problem is handled using an analogy between the dynamics of the sigma-delta modulator and the sinusoidal digital phase-locked loop (DPLL). An approximate fixed point solution is presented and stability criteria are derived\",\"PeriodicalId\":205758,\"journal\":{\"name\":\"2006 Asia-Pacific Conference on Communications\",\"volume\":\"460 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-12-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 Asia-Pacific Conference on Communications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APCC.2006.255855\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 Asia-Pacific Conference on Communications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCC.2006.255855","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Stability Analysis Of A Third-Order Digital Sigma-Delta Modulator
The stability of a high-order sigma-delta modulator has been addressed under dc input. A new approach for stability analysis is proposed. A nonlinear circle map is suggested to model the dynamics of the modulator. The stability problem is handled using an analogy between the dynamics of the sigma-delta modulator and the sinusoidal digital phase-locked loop (DPLL). An approximate fixed point solution is presented and stability criteria are derived