M. P. Chew, S. Saxena, Thomas F. Cobourn, P. K. Mozumder, A. Strojwas
{"title":"并行技术开发和单元库优化的新方法","authors":"M. P. Chew, S. Saxena, Thomas F. Cobourn, P. K. Mozumder, A. Strojwas","doi":"10.1109/ICVD.1999.745118","DOIUrl":null,"url":null,"abstract":"To minimize the time to market and cost of new sub 0.2 um process technologies and products, PDF Solutions, Inc. has developed a new comprehensive approach based on the use of predictive simulation roots combined with highly efficient experimental design techniques and special test structures. This paper focuses on our approach for concurrent development of new technologies and optimization of cell libraries for these technologies. We present a software system called Circuit Surfer which performs this library optimization in a highly automated fashion and with guaranteed correctness in silicon. We demonstrate several examples of Circuit Surfer applications to cell library design to optimize such objective functions as performance, cell area or yield.","PeriodicalId":443373,"journal":{"name":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","volume":"65 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A new methodology for concurrent technology development and cell library optimization\",\"authors\":\"M. P. Chew, S. Saxena, Thomas F. Cobourn, P. K. Mozumder, A. Strojwas\",\"doi\":\"10.1109/ICVD.1999.745118\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To minimize the time to market and cost of new sub 0.2 um process technologies and products, PDF Solutions, Inc. has developed a new comprehensive approach based on the use of predictive simulation roots combined with highly efficient experimental design techniques and special test structures. This paper focuses on our approach for concurrent development of new technologies and optimization of cell libraries for these technologies. We present a software system called Circuit Surfer which performs this library optimization in a highly automated fashion and with guaranteed correctness in silicon. We demonstrate several examples of Circuit Surfer applications to cell library design to optimize such objective functions as performance, cell area or yield.\",\"PeriodicalId\":443373,\"journal\":{\"name\":\"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)\",\"volume\":\"65 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-01-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICVD.1999.745118\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVD.1999.745118","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A new methodology for concurrent technology development and cell library optimization
To minimize the time to market and cost of new sub 0.2 um process technologies and products, PDF Solutions, Inc. has developed a new comprehensive approach based on the use of predictive simulation roots combined with highly efficient experimental design techniques and special test structures. This paper focuses on our approach for concurrent development of new technologies and optimization of cell libraries for these technologies. We present a software system called Circuit Surfer which performs this library optimization in a highly automated fashion and with guaranteed correctness in silicon. We demonstrate several examples of Circuit Surfer applications to cell library design to optimize such objective functions as performance, cell area or yield.