通过自限沉积含硅控制层实现In0.53Ga0.47As(001)−(2x4)和Si0.5Ge0.5(110)表面钝化

M. Edmonds, T. Kent, S. Wolf, K. Sardashti, M. Chang, J. Kachian, R. Droopad, E. Chagarov, A. Kummel
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引用次数: 1

摘要

金属氧化物半导体场效应晶体管(mosfet)正从仅使用硅和锗转向使用SiGe和InGaAs等化合物半导体,以进一步提高晶体管性能。如果通用控制单层(UCM)可以ALD或自限制CVD沉积在多种材料和晶体表面上,则可以采用更广泛的通道材料,从而实现更好的载流子约束和更高的迁移率。硅独特地与InGa1-xAs、InxGa1-xSb、InxGa1-xN、SiGe和Ge的所有晶面紧密结合,使衬底悬空键转移到硅上,随后可能被原子氢钝化。随后,表面可以用氧化剂(如HOOH(g))功能化以形成UCM终止Si-OH层,或用氮化剂(如N2H4(g))功能化以形成Si-Nx扩散屏障和表面保护层。本研究的重点是通过两个独立的自限CVD工艺在InGaAs(001)-(2x4)上沉积饱和Si-Hx和Si-OH种子层,并通过ALD工艺在Si0.5Ge0.5(110)上沉积Si-Nx种子层。在InGaAs(001)-(2x4)和Si0.5Ge0.5(110)表面上,利用XPS结合STS/STM表征了这些含硅控制层的电学和表面性能。在n型InGaAs(001)衬底上进行了MOSCAP器件的制备,并通过自限CVD沉积了Si-Hx钝化控制层,以确定对Cmax,频率色散和中隙阱态的影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
In0.53Ga0.47As(001)−(2x4) and Si0.5Ge0.5(110) surface passivation by self-limiting deposition of silicon containing control layers
Metal oxide semiconductor field effect transistors (MOSFETs) are diverging from the exclusive use of silicon and germanium to the employment of compound semiconductors such as SiGe and InGaAs to further increase transistor performance. A broader range of channel materials allowing better carrier confinement and higher mobility could be employed if a universal control monolayer (UCM) could be ALD or self-limiting CVD deposited on multiple materials and crystallographic faces. Silicon uniquely bonds strongly to all crystallographic faces of InGa1-xAs, InxGa1-xSb, InxGa1-xN, SiGe, and Ge enabling transfer of substrate dangling bonds to silicon, which may subsequently be passivated by atomic hydrogen. Subsequently, the surface may be functionalized with an oxidant such as HOOH(g) in order to create a UCM terminating Si-OH layer, or a nitriding agent such as N2H4(g) in order to create an Si-Nx diffusion barrier and surface protection layer. This study focuses on depositing saturated Si-Hx, and Si-OH seed layers via two separate self-limiting CVD processes on InGaAs(001)-(2x4), and depositing a Si-Nx seed layer on Si0.5Ge0.5(110) via an ALD process. XPS in combination with STS/STM were employed to characterize the electrical and surface properties of these silicon containing control layers on InGaAs(001)-(2x4) and Si0.5Ge0.5(110) surfaces. MOSCAP device fabrication was performed on n-type InGaAs(001) substrates with and without a Si-Hx passivation control layer deposited by self-limiting CVD in order to determine the effects on Cmax, frequency dispersion, and midgap trap states.
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