硬件分频器

Dimitar Tyanev, Yulka Petkova
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引用次数: 3

摘要

在算术逻辑设备中,除法运算是四种基本算术运算中最慢的。本文提出了一种基于非还原除法的算法,利用基数2的补符号数来提高计算速度。通过在相关条件满足时提前终止算法,实现了快速计算。提出了该方案的硬件实现方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Hardware Divider
Operation division is the slowest of the four basic arithmetic operations performed in arithmetic-logic devices. In this paper we offer a proposal to speed up computations based on non-restoring division algorithm by the use of the radix-2 two's complement signed numbers. Fast computation is achieved by the early termination of the algorithm when the relevant condition is in place. A hardware implementation of the solution is proposed.
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