{"title":"硬件分频器","authors":"Dimitar Tyanev, Yulka Petkova","doi":"10.1145/3274005.3274009","DOIUrl":null,"url":null,"abstract":"Operation division is the slowest of the four basic arithmetic operations performed in arithmetic-logic devices. In this paper we offer a proposal to speed up computations based on non-restoring division algorithm by the use of the radix-2 two's complement signed numbers. Fast computation is achieved by the early termination of the algorithm when the relevant condition is in place. A hardware implementation of the solution is proposed.","PeriodicalId":152033,"journal":{"name":"Proceedings of the 19th International Conference on Computer Systems and Technologies","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-09-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Hardware Divider\",\"authors\":\"Dimitar Tyanev, Yulka Petkova\",\"doi\":\"10.1145/3274005.3274009\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Operation division is the slowest of the four basic arithmetic operations performed in arithmetic-logic devices. In this paper we offer a proposal to speed up computations based on non-restoring division algorithm by the use of the radix-2 two's complement signed numbers. Fast computation is achieved by the early termination of the algorithm when the relevant condition is in place. A hardware implementation of the solution is proposed.\",\"PeriodicalId\":152033,\"journal\":{\"name\":\"Proceedings of the 19th International Conference on Computer Systems and Technologies\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-09-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 19th International Conference on Computer Systems and Technologies\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3274005.3274009\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 19th International Conference on Computer Systems and Technologies","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3274005.3274009","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Operation division is the slowest of the four basic arithmetic operations performed in arithmetic-logic devices. In this paper we offer a proposal to speed up computations based on non-restoring division algorithm by the use of the radix-2 two's complement signed numbers. Fast computation is achieved by the early termination of the algorithm when the relevant condition is in place. A hardware implementation of the solution is proposed.