K. Kaharudin, F. Salehuddin, A. Zain, M. Aziz, Z. Manap, Nurul Akmal Abd Salam, Wira Hidayat Bin Mohd Saad
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引用次数: 5
摘要
MOSFET器件的小型化导致许多工艺参数的统计变化,这可能导致器件性能的下降。田口法作为一种优化工艺参数变化的工具已被应用。由于田口法仅局限于单个响应的求解,因此将其与灰色关联分析(GRA)相结合来解决多响应优化问题。本文根据WSix/TiO2通道垂直双栅PMOS器件的多种性能特点,提出了一种优化光晕植入能量、光晕植入倾角、源漏极(S/D)植入能量和源漏极(S/D)植入倾角的方法。利用基于L9田口法的归一化实验结果计算灰色关联系数和等级。最终结果表明,该工艺参数优化成功,获得了标称阈值电压(-0.1783 V)、高驱动电流(1539.1 μA/μm)和低漏电流(6.749E-11 a /μm),满足国际技术路线图半导体(ITRS) 2013对高性能逻辑多栅极技术的预测。
Multi-response optimization in vertical double gate PMOS device using Taguchi method and grey relational analysis
Miniturization of MOSFET device leads to statistical variation of many process parameters that may cause the degradation of the device performance. Taguchi method has been applied as a tool to optimize the process parameter variation. Since, Taguchi method is only limited to the solution of a single response, it is combined with grey relational analysis (GRA) to solve multi-response optimization. This paper presents a proposed method to optimize halo implant energy, halo implant tilt angle, source/drain (S/D) implant energy and source/drain (S/D) implant tilt angle upon multiple performance characteristics of WSix/TiO2 channel vertical double-gate PMOS device. The normalized experimental results based on L9 Taguchi method are utilized to compute grey relational coefficients and grades. The final results show that the process parameters have been successfully optimized in obtaining a nominal threshold voltage (-0.1783 V), a high drive current (1539.1 μA/μm) and a low leakage current (6.749E-11 A/μm) which meet the International Technology Roadmap Semiconductor (ITRS) 2013 prediction for high performance logic multi-gate technology.