Shaahin Angizi, Zhezhi He, Farhana Parveen, Deliang Fan
{"title":"RIMPA:一种新的可重构双模内存处理架构,具有自旋霍尔效应驱动的畴壁运动器件","authors":"Shaahin Angizi, Zhezhi He, Farhana Parveen, Deliang Fan","doi":"10.1109/ISVLSI.2017.18","DOIUrl":null,"url":null,"abstract":"This paper presents a new Reconfigurable dualmode In-Memory Processing Architecture based on spin Hall effect-driven domain wall motion device called RIMPA. In this architecture, a portion of spintronic memory array can be reconfigured to either non-volatile memory or in-memory logic. Accordingly, computation can be performed within memory without long distance data transfer or large in-memory logic area overhead concerning conventional Von-Neumann or in-memory computing architecture, respectively. The device to architecture simulation results show that, with 17% area increase, RIMPA improves the operating energy by 72.2% as compared with the conventional non-volatile in-memory logic schemes. We show that the Advanced Encryption Standard (AES) algorithm which is widely used in secure big data storage, can be efficiently mapped to RIMPA with 68.8% and 20.8% energy saving in comparison to CMOS-ASIC and recent DW-AES implementations, respectively.","PeriodicalId":187936,"journal":{"name":"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"29","resultStr":"{\"title\":\"RIMPA: A New Reconfigurable Dual-Mode In-Memory Processing Architecture with Spin Hall Effect-Driven Domain Wall Motion Device\",\"authors\":\"Shaahin Angizi, Zhezhi He, Farhana Parveen, Deliang Fan\",\"doi\":\"10.1109/ISVLSI.2017.18\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new Reconfigurable dualmode In-Memory Processing Architecture based on spin Hall effect-driven domain wall motion device called RIMPA. In this architecture, a portion of spintronic memory array can be reconfigured to either non-volatile memory or in-memory logic. Accordingly, computation can be performed within memory without long distance data transfer or large in-memory logic area overhead concerning conventional Von-Neumann or in-memory computing architecture, respectively. The device to architecture simulation results show that, with 17% area increase, RIMPA improves the operating energy by 72.2% as compared with the conventional non-volatile in-memory logic schemes. We show that the Advanced Encryption Standard (AES) algorithm which is widely used in secure big data storage, can be efficiently mapped to RIMPA with 68.8% and 20.8% energy saving in comparison to CMOS-ASIC and recent DW-AES implementations, respectively.\",\"PeriodicalId\":187936,\"journal\":{\"name\":\"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"volume\":\"54 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-07-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"29\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVLSI.2017.18\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVLSI.2017.18","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
RIMPA: A New Reconfigurable Dual-Mode In-Memory Processing Architecture with Spin Hall Effect-Driven Domain Wall Motion Device
This paper presents a new Reconfigurable dualmode In-Memory Processing Architecture based on spin Hall effect-driven domain wall motion device called RIMPA. In this architecture, a portion of spintronic memory array can be reconfigured to either non-volatile memory or in-memory logic. Accordingly, computation can be performed within memory without long distance data transfer or large in-memory logic area overhead concerning conventional Von-Neumann or in-memory computing architecture, respectively. The device to architecture simulation results show that, with 17% area increase, RIMPA improves the operating energy by 72.2% as compared with the conventional non-volatile in-memory logic schemes. We show that the Advanced Encryption Standard (AES) algorithm which is widely used in secure big data storage, can be efficiently mapped to RIMPA with 68.8% and 20.8% energy saving in comparison to CMOS-ASIC and recent DW-AES implementations, respectively.