M. S. A. Ramya, D. Nirmal, S. Soman, P. P. Nair, I. Jeba
{"title":"用于VLSI的栅极工程SOI MOSFET分析","authors":"M. S. A. Ramya, D. Nirmal, S. Soman, P. P. Nair, I. Jeba","doi":"10.1109/IMAC4S.2013.6526464","DOIUrl":null,"url":null,"abstract":"The Dual (DM) Trigate Silicon On Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is designed and simulated using Sentaurus TCAD tools and its various parameters are analyzed. The Dual Material Trigate MOSFET has better ON current and reduced leakage current which results in better performance of the device. The ON current obtained is 2.301×10-5 A/μm, the leakage current is 1.793×10-12 A/μm and the perfect ON/OFF ratio is obtained. The technology used here is 22nm.","PeriodicalId":403064,"journal":{"name":"2013 International Mutli-Conference on Automation, Computing, Communication, Control and Compressed Sensing (iMac4s)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Analysis of gate engineered SOI MOSFET for VLSI application\",\"authors\":\"M. S. A. Ramya, D. Nirmal, S. Soman, P. P. Nair, I. Jeba\",\"doi\":\"10.1109/IMAC4S.2013.6526464\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The Dual (DM) Trigate Silicon On Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is designed and simulated using Sentaurus TCAD tools and its various parameters are analyzed. The Dual Material Trigate MOSFET has better ON current and reduced leakage current which results in better performance of the device. The ON current obtained is 2.301×10-5 A/μm, the leakage current is 1.793×10-12 A/μm and the perfect ON/OFF ratio is obtained. The technology used here is 22nm.\",\"PeriodicalId\":403064,\"journal\":{\"name\":\"2013 International Mutli-Conference on Automation, Computing, Communication, Control and Compressed Sensing (iMac4s)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 International Mutli-Conference on Automation, Computing, Communication, Control and Compressed Sensing (iMac4s)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMAC4S.2013.6526464\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 International Mutli-Conference on Automation, Computing, Communication, Control and Compressed Sensing (iMac4s)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMAC4S.2013.6526464","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analysis of gate engineered SOI MOSFET for VLSI application
The Dual (DM) Trigate Silicon On Insulator (SOI) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is designed and simulated using Sentaurus TCAD tools and its various parameters are analyzed. The Dual Material Trigate MOSFET has better ON current and reduced leakage current which results in better performance of the device. The ON current obtained is 2.301×10-5 A/μm, the leakage current is 1.793×10-12 A/μm and the perfect ON/OFF ratio is obtained. The technology used here is 22nm.