Joohee Kim, Jonghyun Cho, J. Pak, Joungho Kim, J. Yook, J. C. Kim
{"title":"高频硅通孔(TSV)失效分析","authors":"Joohee Kim, Jonghyun Cho, J. Pak, Joungho Kim, J. Yook, J. C. Kim","doi":"10.1109/EPEPS.2011.6100237","DOIUrl":null,"url":null,"abstract":"Despite the many advantages of 3D ICs, the yield loss experienced during the 3D IC fabrication process limits the commercialization of 3D IC products. In this study, we propose a novel method for TSV failure analysis and analyze TSV failures electrically to detect failures and their locations in TSV-based 3D IC.","PeriodicalId":313560,"journal":{"name":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"High-frequency through-silicon Via (TSV) failure analysis\",\"authors\":\"Joohee Kim, Jonghyun Cho, J. Pak, Joungho Kim, J. Yook, J. C. Kim\",\"doi\":\"10.1109/EPEPS.2011.6100237\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Despite the many advantages of 3D ICs, the yield loss experienced during the 3D IC fabrication process limits the commercialization of 3D IC products. In this study, we propose a novel method for TSV failure analysis and analyze TSV failures electrically to detect failures and their locations in TSV-based 3D IC.\",\"PeriodicalId\":313560,\"journal\":{\"name\":\"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEPS.2011.6100237\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2011.6100237","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-frequency through-silicon Via (TSV) failure analysis
Despite the many advantages of 3D ICs, the yield loss experienced during the 3D IC fabrication process limits the commercialization of 3D IC products. In this study, we propose a novel method for TSV failure analysis and analyze TSV failures electrically to detect failures and their locations in TSV-based 3D IC.