具有超宽视频带宽的ka波段线性CMOS功率放大器

2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2017-06-01 DOI:10.1109/RFIC.2017.7969057

Daechul Jeong, Kyunghoon Moon, Seokwon Lee, Byungjoon Park, Jihoon Kim, J. Son, Bumman Kim

{"title":"具有超宽视频带宽的ka波段线性CMOS功率放大器","authors":"Daechul Jeong, Kyunghoon Moon, Seokwon Lee, Byungjoon Park, Jihoon Kim, J. Son, Bumman Kim","doi":"10.1109/RFIC.2017.7969057","DOIUrl":null,"url":null,"abstract":"A highly linear power amplifier (PA) with ultra-wide video bandwidth is designed at a Ka-band for 5G application. To get a high linearity with high efficiency, a deep class-AB topology with 2nd harmonic control circuits is employed, reducing the 3rd order nonlinearity. Further, an efficient low-drop out (LDO) regulator is proposed to suppress the memory effect generated by the envelope and fundamental nonlinear mixing. The PA, composed of 3 cascaded common-source (CS) stages, achieves peak PAE of 21.8% at output power of 14 dBm with 22 dB gain. The 3rd order inter-modulation distortion (IMD3) at an output power of 5 dBm is under −30 dBc for a video bandwidth of 1 GHz. The PA and LDO are fabricated in a 65 nm CMOS process and occupy 0.53 mm2.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Linear CMOS power amplifier at Ka-band with ultra-wide video bandwidth\",\"authors\":\"Daechul Jeong, Kyunghoon Moon, Seokwon Lee, Byungjoon Park, Jihoon Kim, J. Son, Bumman Kim\",\"doi\":\"10.1109/RFIC.2017.7969057\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A highly linear power amplifier (PA) with ultra-wide video bandwidth is designed at a Ka-band for 5G application. To get a high linearity with high efficiency, a deep class-AB topology with 2nd harmonic control circuits is employed, reducing the 3rd order nonlinearity. Further, an efficient low-drop out (LDO) regulator is proposed to suppress the memory effect generated by the envelope and fundamental nonlinear mixing. The PA, composed of 3 cascaded common-source (CS) stages, achieves peak PAE of 21.8% at output power of 14 dBm with 22 dB gain. The 3rd order inter-modulation distortion (IMD3) at an output power of 5 dBm is under −30 dBc for a video bandwidth of 1 GHz. The PA and LDO are fabricated in a 65 nm CMOS process and occupy 0.53 mm2.\",\"PeriodicalId\":349922,\"journal\":{\"name\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2017.7969057\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2017.7969057","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 8

摘要

为5G应用，在ka波段设计了一种具有超宽视频带宽的高线性功率放大器(PA)。为了获得高线性度和高效率，采用了带2次谐波控制电路的深ab类拓扑，降低了三阶非线性。此外，提出了一种有效的低降差(LDO)调节器来抑制包络和基本非线性混合产生的记忆效应。该放大器由3级联的共源级组成，在输出功率为14 dBm，增益为22 dB时，峰值PAE为21.8%。当视频带宽为1ghz时，输出功率为5dbm时的三阶调制间失真(IMD3)小于- 30dbc。PA和LDO采用65 nm CMOS工艺制造，占地0.53 mm2。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Linear CMOS power amplifier at Ka-band with ultra-wide video bandwidth

A highly linear power amplifier (PA) with ultra-wide video bandwidth is designed at a Ka-band for 5G application. To get a high linearity with high efficiency, a deep class-AB topology with 2nd harmonic control circuits is employed, reducing the 3rd order nonlinearity. Further, an efficient low-drop out (LDO) regulator is proposed to suppress the memory effect generated by the envelope and fundamental nonlinear mixing. The PA, composed of 3 cascaded common-source (CS) stages, achieves peak PAE of 21.8% at output power of 14 dBm with 22 dB gain. The 3rd order inter-modulation distortion (IMD3) at an output power of 5 dBm is under −30 dBc for a video bandwidth of 1 GHz. The PA and LDO are fabricated in a 65 nm CMOS process and occupy 0.53 mm2.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

自引率

0.00%

发文量