Defect inspection sampling plans-which one is right for me?

Most wafer fabrication lines now employ some form of defect inspection plan to identify killer defect types on its wafers and thus protect and predict die sort yields. Although often viewed as a nonvalue added process step, defect inspection is typically incorporated into the process flow at a number of points. However, as with all process steps, there is an associated cost, and oversampling can add more to the wafer manufacturing cost than the cost of field loss that might otherwise have been recovered. It is therefore imperative that the sampling methodology used in the fab is cost effective, i.e. that the benefits gained far outweigh inspection cost. As a minimum, the plan must be able to detect excursions that will ultimately result in probe yield loss. Also, excursion detection must be timely to ensure that the product at risk from excursions is minimized. In summary, the plan must be consistent with the acceptable excursion yield loss in the fab. This paper looks at plans used in two very different fabs on the same site. The first is a 4" line with >1 /spl mu/m geometries. The second is a 6" line with <0.5 /spl mu/m geometries. The same overall structure governs both fabs and the equipment set in both areas is largely similar. However, the sampling strategy used in the two areas is different, as each area plan is tailored specifically to meet its needs in relation to yield objectives. This paper describes the two plans used, and looks at how inspection sensitivity must be tailored to meet the needs of the plan. We look at various defect types, and how some must be sieved out to ensure that the inspection data generated is meaningful.