{"title":"基于开关的45nm轻掺杂和重掺杂CMOS衬底电流评估","authors":"Sanjay Sharma, R. P. Yadav, V. Janyani","doi":"10.1109/VLSI-SATA.2016.7593058","DOIUrl":null,"url":null,"abstract":"Integration of analog and digital circuits is a vital design issue in mixed signal circuits. Switching activity at the digital end widely affects the analog circuitry. This paper presents the generation and variation of substrate current due to the switching activity in a digital circuit and also how the substrate current varies with the switching frequency. The circuit under test is a CMOS inverter at 45nm technology node. Circuit is made up of virtually fabricated NMOS and PMOS devices, the devices are made using ATHENA process simulator and the circuit is then implemented and evaluated in MixedMode. Transient simulation is performed and then substrate current is plotted with respect to two different input pulses for lightly doped and heavily doped substrate CMOS inverter. As the switching frequency increases the substrate current increases, this is applicable for both the lightly and heavily doped CMOS.","PeriodicalId":328401,"journal":{"name":"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Switching based evaluation of substrate current in lightly and heavily doped CMOS at 45nm\",\"authors\":\"Sanjay Sharma, R. P. Yadav, V. Janyani\",\"doi\":\"10.1109/VLSI-SATA.2016.7593058\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Integration of analog and digital circuits is a vital design issue in mixed signal circuits. Switching activity at the digital end widely affects the analog circuitry. This paper presents the generation and variation of substrate current due to the switching activity in a digital circuit and also how the substrate current varies with the switching frequency. The circuit under test is a CMOS inverter at 45nm technology node. Circuit is made up of virtually fabricated NMOS and PMOS devices, the devices are made using ATHENA process simulator and the circuit is then implemented and evaluated in MixedMode. Transient simulation is performed and then substrate current is plotted with respect to two different input pulses for lightly doped and heavily doped substrate CMOS inverter. As the switching frequency increases the substrate current increases, this is applicable for both the lightly and heavily doped CMOS.\",\"PeriodicalId\":328401,\"journal\":{\"name\":\"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)\",\"volume\":\"86 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSI-SATA.2016.7593058\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-SATA.2016.7593058","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Switching based evaluation of substrate current in lightly and heavily doped CMOS at 45nm
Integration of analog and digital circuits is a vital design issue in mixed signal circuits. Switching activity at the digital end widely affects the analog circuitry. This paper presents the generation and variation of substrate current due to the switching activity in a digital circuit and also how the substrate current varies with the switching frequency. The circuit under test is a CMOS inverter at 45nm technology node. Circuit is made up of virtually fabricated NMOS and PMOS devices, the devices are made using ATHENA process simulator and the circuit is then implemented and evaluated in MixedMode. Transient simulation is performed and then substrate current is plotted with respect to two different input pulses for lightly doped and heavily doped substrate CMOS inverter. As the switching frequency increases the substrate current increases, this is applicable for both the lightly and heavily doped CMOS.