{"title":"基于紧凑电流模型的栅极氧化物击穿导致的SRAM可靠性退化建模","authors":"Rui Zhang, Taizhi Liu, Kexin Yang, L. Milor","doi":"10.1109/DCIS.2017.8311631","DOIUrl":null,"url":null,"abstract":"Gate oxide breakdown (GOBD) degrades the performance of SRAMs. In this paper, a modeling methodology for SRAM reliability degradation due to GOBD is implemented with a compact current model. SRAM lifetime is obtained from Monte Carlo simulations while considering the duty cycle distribution and process variations. We analyzed the lifetime distribution and failure probability of SRAM cells under different stress, and found that the data cache with a duty cycle distribution closer to 50% has a lower failure probability. Moreover, the effect of Error Correcting Codes (ECC) is also studied.","PeriodicalId":136788,"journal":{"name":"2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS)","volume":"221 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Modeling for SRAM reliability degradation due to gate oxide breakdown with a compact current model\",\"authors\":\"Rui Zhang, Taizhi Liu, Kexin Yang, L. Milor\",\"doi\":\"10.1109/DCIS.2017.8311631\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Gate oxide breakdown (GOBD) degrades the performance of SRAMs. In this paper, a modeling methodology for SRAM reliability degradation due to GOBD is implemented with a compact current model. SRAM lifetime is obtained from Monte Carlo simulations while considering the duty cycle distribution and process variations. We analyzed the lifetime distribution and failure probability of SRAM cells under different stress, and found that the data cache with a duty cycle distribution closer to 50% has a lower failure probability. Moreover, the effect of Error Correcting Codes (ECC) is also studied.\",\"PeriodicalId\":136788,\"journal\":{\"name\":\"2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS)\",\"volume\":\"221 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DCIS.2017.8311631\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 32nd Conference on Design of Circuits and Integrated Systems (DCIS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DCIS.2017.8311631","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Modeling for SRAM reliability degradation due to gate oxide breakdown with a compact current model
Gate oxide breakdown (GOBD) degrades the performance of SRAMs. In this paper, a modeling methodology for SRAM reliability degradation due to GOBD is implemented with a compact current model. SRAM lifetime is obtained from Monte Carlo simulations while considering the duty cycle distribution and process variations. We analyzed the lifetime distribution and failure probability of SRAM cells under different stress, and found that the data cache with a duty cycle distribution closer to 50% has a lower failure probability. Moreover, the effect of Error Correcting Codes (ECC) is also studied.