A. Agarwal, N. Banerjee, S. Hsu, R. Krishnamurthy, K. Roy
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引用次数: 10
摘要
本文描述了一个48times42b 1读1写端口寄存器文件，该文件在65 nm CMOS中工作在1.2 V (6.1-6.3 GHz, 47 mW)至0.2 V (4-4.4 MHz, 0.01 mW)的电源电压范围内。提出了三层堆叠和强制堆叠两种可编程技术，使寄存器文件能够在超低电源电压下工作，同时在高电源电压下保持与传统设计相当的性能。
A 200mV to 1.2V, 4.4MHz to 6.3GHz, 48×42b 1R/1W programmable register file in 65nm CMOS
This paper describes a 48times42b 1-read, 1-write ported register file which operates at supply voltage range of 1.2 V (6.1-6.3 GHz, 47 mW) down to 0.2 V (4-4.4 MHz, 0.01 mW) in 65 nm CMOS. Two programmable techniques, triple stacking and forced stacking are proposed which enable register files to operate at ultra low supply voltages while maintaining the performance comparable to conventional design at high supply voltages.
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